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Table of contents

Luckily enough, we can easily solve the problem since the MIC has provision for adjustment of the soft-start time. Going back to the schematic:. On the Waveform Viewer, we can see the results of both simulations.

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For more clarity, only the waveforms of interest for measurements are retained. Notice that the VOUT rate of rise has slowed down significantly. Also the maximum values of the input supply current and of the output capacitor current have significantly diminished.

The goal of this case study is to understand the impact of input voltage, load current and passive components on the quality of the output voltage, stability, and analyze PFM and PWM mode switching waveforms. In this section, MCP will be used for this test, but the procedure is similar for the other parts.

Set output voltage to 3. EN Thresholds: this test consists of applying a triangular signal on the EN pin. The frequency of this signal and the simulation time have to be chosen considering the start-up time of the converter. The relevant voltage probes can be altered such that they are plotted on the same graph.

During PFM mode, a controlled peak current is used to pump the output up to the threshold limit. In PFM mode, a comparator is used to terminate switching when the output voltage reaches the upper threshold limit. Once switching has ended, the output voltage will decay or coast down. The PFM mode frequency is a function of input voltage, output voltage and load current. For this setup, the output current has to be linearly increased; this can be done using a PWL Current source. The advantage of PFM operation is low input current consumption at light loads high efficiency.

The goal of these case studies is to understand the impact of input voltage and load current on the overall converter performance. There are applications in which a simple switching converter will be able to output a constant voltage in this example 12 VDC while input voltage is either below, close to, or above the required output.

The proposed examples to analyze include a typical MCP step-down buck converter application with the addition of a logic-level NMOS transistor, a gate driver, an extra Schottky diode and few passives. For simulation with MPLAB Mindi analog simulator, the integrated gate driver from the below schematic used for ADM Evaluation Board was replaced by a pair of bipolar transistors in totem pole configuration.

The goal of this section is to understand and analyze the MCP in a buck-boost topology. Efficient use of the simulator can reduce the effort to only a couple of simulations during the preliminary application design. The next steps modify this standard buck topology schematic to the buck-boost configuration seen below. Similarly, find the PNP. Stack all curves to view the results. Throughout the sweep, the output voltage remains in regulation. The battery internal resistance is not included in this simulation.

If you know the value of the battery internal resistance, you must add it on the schematic in series with the input voltage supply! The goal of these case studies is to understand the impact of the input voltage, load current, and passive components to the quality and stability of the output current. By varying the duty cycle, the average LED current changes proportionally, as shown in the figure below on the right.

Overvoltage protection is designed to save the MCP if the output voltage exceeds 5.

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If the load is disconnected an LED fails , the output voltage increases rapidly, because this topology is regulating the current, which is 0. The protection circuit trips, stops the switching, and periodically monitors the output to verify that the fault is still present. This feature does not protect the LED.

The MCP's response to open load event is presented in the below waveform:. Using cursors, measure VOUT and identify where the limitation occurs.

Introduction

Notice the waveform shape corresponding to the periodic restart attempts. The goal of this section is to improve your ability to include LEDs in simulations. A real LED is a two-pin nonlinear semiconductor device, as seen in the figure to the right. Each LED has slightly different characteristics, which makes modeling the nonlinearity challenging. The nonlinear curve is approximated by linear segments that are defined by a table of vertices.

The model accuracy can, therefore, be controlled by the number of segments. To update the default model with the custom LED's data:. The default value is 10 segments. With all segments entered, it is recommended to validate the LED model in a separate setup before the actual schematic is created. It should include a variable voltage source, a current probe, and a voltage probe, as seen in the following figure:.

When the graphs are plotted, stack the curves to observe the following figure:. The resulted graph looks quite similar to the one in the datasheet, where the input values were taken from. Now the LED Model is ready to be placed in the real schematic. Repeat the simulation with the input line voltage set to 90 VAC, the lowest allowed line voltage.


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The goal of this section is to understand how to modify the number of the LEDs for each TAP and to observe the impact. Six linear current regulators sink current at each tap and are sequentially turned on and off, tracking the input sine wave voltage. The goal of this section is to show how to reduce the cost of the application while still maintaining the same performance. Run the simulation. We can see that we gained only 10 Lm by using one LED, which is not optimum considering the cost of solution. Be sure to ground the LM terminal of DSeg4. We can see that the total lumens reduces from to , which means a difference of Lm.

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The goal of this section is to understand the impact on the performance of current through the LED strip. The IC is less stressed, because the dissipated power reduces from 1. However, this modification is not recommended because of reduced performances and low utilization of the LEDs.

The IC is too stressed because dissipated power increase from 1.

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The goal of this chapter is to understand how to use buck LED drivers using open-loop, peak-current mode control. The goal of this section is to understand and analyze what an open loop peak current controller does. Throughout these exercises, the benefits of this control method will be presented. A peak-current-controlled buck converter can give reasonable LED current variation over a wide range of input and LED voltages. It needs little effort in feedback control design.

An open loop, peak current mode average current can be calculated by:. This section illustrates the differences between constant frequency and constant off-time operation.

Choosing Executives: A Research Report on the Peak Selection Simulation

It is useful when we cannot find the exact R1 value required for obtaining the LED current and when adjusting the current level is desired. The actual threshold voltage will be the lower of these two. This is because of the minimum on time for the FET ns. These plots show you that the PWM-dimming response is limited only by the rate of rise of the inductor current, enabling a very fast rise and fall times of the LED current. This chapter illustrates the simulation and measurement of linear circuits by analyzing transient, AC, noise, and Fast Fourier Transform FFT responses of a non-inverting amplifier.

Measurements included in this analysis are signal voltages, current in the wire, device current, frequency response, and FFT. Double-click on signal source V2 to edit its signal source type, frequency, amplitude, and offset. Select the signal source to be of type 'Sine'. Uncheck the default setting for the '. PRINT' step and enter n for the resolution at which the transient response is to be computed. It is best practice to select a value times faster than the signal period to increase the output resolution. Enable the radio button 'Output at.

PRINT step'. When completed select Ok. Measurement probes must be placed at the input and output nodes to view the simulation results. See the figure below for placement of probes Vsignal and AmpOut.